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Single fault reliability analysis in FPGA implemented circuits
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Single fault reliability analysis in FPGA implemented circuits

Jahanirad, H.

  1. DOI:10.1109/ISQED.2012.6187473
  2. Main Entry: Jahanirad, H.
  3. Title:Single fault reliability analysis in FPGA implemented circuits.
  4. Publisher:2012.
  5. Abstract:Reliability analysis in FPGA implementation of logic circuits is an important issue in designing fault tolerant systems for faulty environments. In this paper an analytical method is developed for analyzing such systems. This method is based on signal probability propagation of faults from the location of appearance to final outputs of circuit. Single fault model is used for the faults occurred in routes and LUTs. In addition reconvergent fan-outs are handled using 16 correlation coefficients propagation approach. Experimental results show a good agreement between this method and Monte Carlo method for reliability analysis of MCNC benchmarks
  6. Notes:Sharif Repository
  7. Subject:FPGA.
  8. Subject:Correlation coefficient.
  9. Subject:LUT.
  10. Subject:SEU.
  11. Subject:Signal probability.
  12. Subject:Single fault.
  13. Subject:Computer control systems.
  14. Subject:Fault tolerant computer systems.
  15. Subject:Logic design.
  16. Subject:Monte Carlo methods.
  17. Subject:Reliability.
  18. Subject:Reliability analysis.
  19. Subject:Field programmable gate arrays (FPGA)
  20. Added Entry:Mohammadi, K.
  21. Added Entry:Attarsharghi, P.
  22. Added Entry:Sharif University of Technology.
  23. Added Entry:ISQED 2012
  24. Added Entry:13th International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, United States, 19 March 2012 through 21 March 2012
  25. Source: Proceedings - International Symposium on Quality Electronic Design, ISQED, 19 March 2012 through 21 March 2012 ; March , 2012 , Pages 49-56 ; 19483287 (ISSN) ; 9781467310369 (ISBN)
  26. Web Site:http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6187473

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